Referring to FIG. 1, when performing a conventional optimum phase searching, a voltage-controlled oscillator (VCO) 1, a time recovery circuit (TR) 2, an equalizer (EQ) 3 and an analog to digital converter (ADC) 4 are essential modules in a phase searching and prediction system.
Referring to FIG. 2, which is a relationship diagram between phases and mean squared errors (MSE) showing a result obtained from a conventional optimum phase searching method, and MSE is in a jitter state.
Therefore, the conventional optimum phase searching method is to search all possible phases according to the MSE values calculated by a slicer of an equalizer. In order to prevent the time recovery circuit and equalizer from interfering with each other, it is common to disable the time recovery circuit temporarily and having the equalizer work alone. However, when clock signals jitter, several phases might be obtained including unwanted ones, which can cause misjudgment regarding which one is the optimum phase, as seen in FIG. 2.
In addition, open loop and S-curve analysis of the time recovery circuit are also commonly used in a phase searching system. The advantage of open loop is its simpler layout and hence is more economical and stable due to simplicity and easier construction.
When performing the conventional phase searching, accuracy and reliability are concerned since conventional optimum phase searching systems do not have a feedback mechanism. Therefore, the conventional optimum phase searching methods are inaccurate in terms of resulting output and hence are unreliable too.
Therefore, there is a need to provide an accurate and reliable method to find an optimum phase in Ethernet physical layer.